221 search results - page 15 / 45 » Reducing the Interconnection Network Cost of Chip Multiproce... |
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
ISCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Network-on-chip (NoC) has become a critical shared resource in the emerging Chip Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across the enti...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Realizing scalable cache coherence in the many-core era comes with a whole new set of constraints and opportunities. It is widely believed that multi-hop, unordered on-chip networ...
SBCCI
2005
ACM
14 years 1 months ago
2005
ACM
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...
ICS
1998
Tsinghua U.
13 years 11 months ago
1998
Tsinghua U.
In this paper we propose the OPTNET, a novel optical network and associated coherence protocol for scalable multiprocessors. The network divides its channels into broadcast and po...