521 search results - page 98 / 105 » Reduction Strategies and Acyclicity |
HIPEAC
2007
Springer
14 years 2 months ago
2007
Springer
A critical component in the design of secure processors is memory encryption which provides protection for the privacy of code and data stored in off-chip memory. The overhead of ...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
The use of Application Specific Instruction-set Processors (ASIP) is a solution to the problem of increasing complexity in embedded systems design. One of the major challenges in...
ICDCS
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper is concerned with reducing communication costs when executing distributed user tasks in a sensor network. We take a service-oriented abstraction of sensor networks, whe...
INFOCOM
2006
IEEE
14 years 1 months ago
2006
IEEE
— In this paper, we propose a simulation framework, TranSim, that reduces the rate at which packet-events are generated, in order to accelerate large-scale simulation of IP netwo...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...