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CSSE
2008
IEEE
15 years 4 months ago
A Power-Efficient Floating-Point Co-processor Design
According to dramatically growing interesting in power-efficient embedded processor, designers must establish the proper power strategy when they design new embedded processor core...
Xunying Zhang, Xubang Shen
ISCA
2011
IEEE
269views Hardware» more  ISCA 2011»
14 years 6 months ago
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
Mohit Tiwari, Jason Oberg, Xun Li 0001, Jonathan V...
111
Voted
IPPS
1998
IEEE
15 years 6 months ago
An Enhanced Co-Scheduling Method Using Reduced MS-State Diagrams
Instruction scheduling methods based on the construction of state diagrams (or automata) have been used for architectures involving deeply pipelined function units. However, the s...
Ramaswamy Govindarajan, N. S. S. Narasimha Rao, Er...
141
Voted
VIS
2004
IEEE
115views Visualization» more  VIS 2004»
16 years 3 months ago
Visualization in Grid Computing Environments
Grid computing provides a challenge for visualization system designers. In this research, we evolve the dataflow concept to allow parts of the visualization process to be executed...
Ken Brodlie, David A. Duce, Julian R. Gallop, Musb...
132
Voted
COMPSAC
2008
IEEE
15 years 9 months ago
Parallel Table Lookup for Next Generation Internet
The rapid growth of Internet population leads to the shortage of IP addresses. The next generation IP protocol, IPv6, which extends the IP address length from 32 bits to 128 bits,...
Li-Che Hung, Yaw-Chung Chen