1179 search results - page 1 / 236 » Relative Timing Based Verification of Timed Circuits and Sys... |
ASYNC
2002
IEEE
14 years 4 months ago
2002
IEEE
Advanced clock-delayed1 and self-resetting domino circuits are becoming increasingly important design styles in aggressive synchronous as well as asynchronous design. Their design...
ATS
2001
IEEE
14 years 2 months ago
2001
IEEE
This paper develops a framework to support trace theoretic verification of timed circuits and systems. A theoretical foundation for classifying timed traces as either successes or...
CAV
1994
Springer
14 years 3 months ago
1994
Springer
This paper presents a new formalism and a new algorithm for verifying timed circuits. The formalism, called orbital nets, allows hierarchical verification based on abehavioralseman...
ENTCS
2006
13 years 11 months ago
2006
The application of formal methods to analog and mixed signal circuits requires efficient methods tructing abstractions of circuit behaviors. This paper concerns the verification o...
ASPDAC
2004
ACM
14 years 2 months ago
2004
ACM
When time is incorporated in the specification of discrete systems, the complexity of verification grows exponentially. When the temporal behavior is specified with symbols, the ve...