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DAC
2003
ACM
14 years 9 months ago
A survey of techniques for energy efficient on-chip communication
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
Vijay Raghunathan, Mani B. Srivastava, Rajesh K. G...
DAC
2005
ACM
14 years 9 months ago
Designing logic circuits for probabilistic computation in the presence of noise
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
ISCA
2009
IEEE
137views Hardware» more  ISCA 2009»
14 years 3 months ago
A case for an interleaving constrained shared-memory multi-processor
Shared-memory multi-threaded programming is inherently more difficult than single-threaded programming. The main source of complexity is that, the threads of an application can in...
Jie Yu, Satish Narayanasamy
NGC
2000
Springer
14 years 5 days ago
The use of hop-limits to provide survivable ATM group communications
We examine the use of a hop-limit constraint with techniques to provide survivability for connection-oriented ATM group communications. A hop-limit constraint is an approach that ...
William Yurcik, David Tipper, Deep Medhi
SOSP
2007
ACM
14 years 5 months ago
Sinfonia: a new paradigm for building scalable distributed systems
We propose a new paradigm for building scalable distributed systems. Our approach does not require dealing with message-passing protocols—a major complication in existing distri...
Marcos Kawazoe Aguilera, Arif Merchant, Mehul A. S...