282 search results - page 12 / 57 » Reliability- and process-variation aware design of integrate... |
ICCAD
2001
IEEE
14 years 6 months ago
2001
IEEE
This paper presents the sizing rules method for analog CMOS circuit design that consists of: first, the development of a hierarchical library of transistor pair groups as basic b...
ISQED
2002
IEEE
14 years 2 months ago
2002
IEEE
In this paper, we describe a comprehensive layout methodology for bonded three-dimensional integrated circuits (3D ICs). In bonded 3D integration technology, parts of a circuit ar...
GLVLSI
2003
IEEE
14 years 2 months ago
2003
IEEE
The characterization as well as the control of the electromagnetic emission of integrated circuits is an important step in the design process of state of the art integrated circui...
DSD
2011
IEEE
12 years 8 months ago
2011
IEEE
—This paper presents an approach for the reliability-aware design optimization of real-time systems on multi-processor platforms. The optimization is based on an extension of wel...
IOLTS
2006
IEEE
14 years 3 months ago
2006
IEEE
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...