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DAC
1996
ACM
13 years 11 months ago
Bit-Level Analysis of an SRT Divider Circuit
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
Randal E. Bryant
ISCAS
2006
IEEE
94views Hardware» more  ISCAS 2006»
14 years 1 months ago
On the sensitivity of BDDs with respect to path-related objective functions
— Reduced ordered Binary Decision Diagrams (BDDs) are a data structure for efficient representation and manipulation of Boolean functions. They are frequently used in logic synt...
Rüdiger Ebendt, Rolf Drechsler
STACS
2001
Springer
13 years 11 months ago
New Bounds on the OBDD-Size of Integer Multiplication via Universal Hashing
Abstract. Ordered binary decision diagrams (OBDDs) nowadays belong to the most common representation types for Boolean functions. Although they allow important operations such as s...
Philipp Woelfel
DAC
1999
ACM
13 years 11 months ago
Using Lower Bounds During Dynamic BDD Minimization
Ordered Binary Decision Diagrams BDDs are a data structure for representation and manipulation of Boolean functions often applied in VLSI CAD. The choice of the variable orderin...
Rolf Drechsler, Wolfgang Günther
VALUETOOLS
2006
ACM
164views Hardware» more  VALUETOOLS 2006»
14 years 1 months ago
Analysis of Markov reward models using zero-suppressed multi-terminal BDDs
High-level stochastic description methods such as stochastic Petri nets, stochastic UML statecharts etc., together with specifications of performance variables (PVs), enable a co...
Kai Lampka, Markus Siegle