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LCTRTS
2001
Springer
15 years 9 months ago
ILP-based Instruction Scheduling for IA-64
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
Daniel Kästner, Sebastian Winkel
DATE
2000
IEEE
121views Hardware» more  DATE 2000»
15 years 9 months ago
Composite Signal Flow: A Computational Model Combining Events, Sampled Streams, and Vectors
The composite signal flow model of computation targets systems with significant control and data processing parts. It builds on the data flow and synchronous data flow models ...
Axel Jantsch, Per Bjuréus
MSE
1999
IEEE
143views Hardware» more  MSE 1999»
15 years 9 months ago
Automated Team Project Management and Evaluation Through Interactive Web Modules
Team projects represent an important aspect of the microelectronic systems education. In group projects, students learn to work together, delegate responsibilities, and manage tim...
John W. Lockwood
HICSS
1996
IEEE
105views Biometrics» more  HICSS 1996»
15 years 8 months ago
DEVS-C++: A High Performance Modelling and Simulation Environment
Simulation of landscape ecosystems with high realism demands computing power greatly exceeding that of current workstation technology. However, the prospects are excellent that mo...
Bernard P. Zeigler, Yoonkeon Moon, Doohwan Kim, Je...
148
Voted
ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
15 years 8 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...