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DATE
2003
IEEE
103views Hardware» more  DATE 2003»
14 years 2 months ago
Reduced Delay Uncertainty in High Performance Clock Distribution Networks
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....
ISPD
1999
ACM
95views Hardware» more  ISPD 1999»
14 years 1 months ago
Incremental capacitance extraction and its application to iterative timing-driven detailed routing
In this paper, we consider delay optimization in multilayer detailed routing. Given a detailed routing by some detailed router, we iteratively improve the delays of critical nets ...
Yanhong Yuan, Prithviraj Banerjee
DAC
1995
ACM
14 years 14 days ago
Hierarchical Optimization of Asynchronous Circuits
Abstract— Many asynchronous designs are naturally specified and implemented hierarchically as an interconnection of separate asynchronous modules that operate concurrently and c...
Bill Lin, Gjalt G. de Jong, Tilman Kolks
TSE
2008
107views more  TSE 2008»
13 years 8 months ago
Security Requirements Engineering: A Framework for Representation and Analysis
This paper presents a framework for security requirements elicitation and analysis. The framework is based on constructing a context for the system, representing security requireme...
Charles B. Haley, Robin C. Laney, Jonathan D. Moff...
EGH
2009
Springer
13 years 6 months ago
Parallel view-dependent tessellation of Catmull-Clark subdivision surfaces
We present a strategy for performing view-adaptive, crack-free tessellation of Catmull-Clark subdivision surfaces entirely on programmable graphics hardware. Our scheme extends th...
Anjul Patney, Mohamed S. Ebeida, John D. Owens