Sciweavers

425 search results - page 77 / 85
» Requirements, specifications, and minimal refinement
Sort
View
DAC
2007
ACM
14 years 8 months ago
Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors
Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultralow-power designs may even permit embedded systems...
Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert ...
MICCAI
2002
Springer
14 years 8 months ago
Line Integral Convolution for Visualization of Fiber Tract Maps from DTI
Abstract. Diffusion tensor imaging (DTI) can provide the fundamental information required for viewing structural connectivity. However, robust and accurate acquisition and processi...
Tim McGraw, Baba C. Vemuri, Zhizhou Wang, Yunmei C...
EDOC
2006
IEEE
14 years 1 months ago
Services and Networks management through embedded devices and SOA
In this paper we present an embedded device able to manage the remote boot of network nodes by means of Wake on LAN (WoL) through Internet and Wide Area Network, presenting it as ...
Virgilio Gilart-Iglesias, Francisco Maciá P...
ISLPED
2005
ACM
93views Hardware» more  ISLPED 2005»
14 years 1 months ago
Power-aware code scheduling for clusters of active disks
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
FPGA
2005
ACM
97views FPGA» more  FPGA 2005»
14 years 1 months ago
Techniques for synthesizing binaries to an advanced register/memory structure
Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...
Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid