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» Resilient design in scaled CMOS for energy efficiency
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VLSI
2010
Springer
13 years 5 months ago
Trends and techniques for energy efficient architectures
Abstract--Microprocessor architectures have become increasingly power limited in recent years. Currently power and thermal envelopes dictate peak performance limits more than any o...
Victor Jimenez, Roberto Gioiosa, Eren Kursun, Fran...
DAC
2005
ACM
14 years 8 months ago
Dynamic slack reclamation with procrastination scheduling in real-time embedded systems
Leakage energy consumption is an increasing concern in current and future CMOS technologygenerations. Procrastination scheduling, where task execution can be delayed to maximize t...
Ravindra Jejurikar, Rajesh K. Gupta
ISLPED
2003
ACM
85views Hardware» more  ISLPED 2003»
14 years 26 days ago
Energy recovery clocking scheme and flip-flops for ultra low-energy applications
A significant fraction of the total power in highly synchronous systems is dissipated over clock networks. Hence, low-power clocking schemes would be promising approaches for futu...
Matthew Cooke, Hamid Mahmoodi-Meimand, Kaushik Roy
ICC
2008
IEEE
127views Communications» more  ICC 2008»
14 years 2 months ago
On the Devolution of Large-Scale Sensor Networks in the Presence of Random Failures
—In battery-constrained large-scale sensor networks, nodes are prone to random failures due to various reasons, such as energy depletion and hostile environment. Random failures ...
Fei Xing, Wenye Wang
PATMOS
2004
Springer
14 years 29 days ago
A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-Chip Buses
Abstract. Crosstalk causes logical errors due to data dependent delay degradation as well as energy consumption and is considered the biggest signal integrity challenge for long on...
Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan