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» Resilient design in scaled CMOS for energy efficiency
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ICCAD
2003
IEEE
193views Hardware» more  ICCAD 2003»
14 years 27 days ago
FROSTY: A Fast Hierarchy Extractor for Industrial CMOS Circuits
: This paper presents FROSTY, a computer program for automatically extracting the hierarchy of a large-scale digital CMOS circuit from its transistor-level netlist description and ...
Lei Yang, C.-J. Richard Shi
CORR
2010
Springer
177views Education» more  CORR 2010»
13 years 5 months ago
Dynamic Scheduling of Skippable Periodic Tasks with Energy Efficiency in Weakly Hard Real-Time System
Energy consumption is a critical design issue in real-time systems, especially in battery- operated systems. Maintaining high performance, while extending the battery life between...
Santhi Baskaran, P. Thambidurai
ICASSP
2011
IEEE
12 years 11 months ago
Energy-optimized high performance FFT processor
This paper proposes an ultra low energy FFT processor suitable for sensor applications. The processor is based on R4MDC but achieves full utilization of computational elements. It...
Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, D...
ECRTS
2004
IEEE
13 years 11 months ago
Energy-Efficient Policies for Request-Driven Soft Real-Time Systems
Computing systems, ranging from small battery-operated embedded systems to more complex general purpose systems, are designed to satisfy various computation demands in some accept...
Cosmin Rusu, Ruibin Xu, Rami G. Melhem, Daniel Mos...
ISQED
2006
IEEE
153views Hardware» more  ISQED 2006»
14 years 1 months ago
Improving Transient Error Tolerance of Digital VLSI Circuits Using RObustness COmpiler (ROCO)
Due to aggressive technology scaling, VLSI circuits are becoming increasingly susceptible to transient errors caused by single-event-upsets (SEUs). In this paper, we introduce two...
Chong Zhao, Sujit Dey