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143
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ICCS
2005
Springer
15 years 9 months ago
Performance and Scalability Analysis of Cray X1 Vectorization and Multistreaming Optimization
Cray X1 Fortran and C/C++ compilers provide a number of loop transformations, notably vectorization and multistreaming, in order to exploit the multistreaming processor (MSP) hard...
Sadaf R. Alam, Jeffrey S. Vetter
131
Voted
ASPDAC
2004
ACM
97views Hardware» more  ASPDAC 2004»
15 years 9 months ago
Complexity analysis and speedup techniques for optimal buffer insertion with minimum cost
As gate delays decrease faster than wire delays for each technology generation, buffer insertion becomes a popular method to reduce the interconnect delay. Several modern buffer in...
Weiping Shi, Zhuo Li, Charles J. Alpert
216
Voted
HICSS
2003
IEEE
260views Biometrics» more  HICSS 2003»
15 years 9 months ago
Automating Land Management: An Interpretive Analysis of Information Technology Management within the Bureau of Land Management
Given societies’ massive investment in information technology and the potentially catastrophic consequences of IT failures, it is becoming increasingly critical to understand ho...
John C. Beachboard
143
Voted
ICPPW
2003
IEEE
15 years 9 months ago
Security Aspects of Wireless Heterogeneous Databases - Protocol, Performance, and Energy Analysis
Users have been demanding information “anytime, anywhere”. The notion of accessing diverse and autonomous information repositories with different APIs is not accepted. This ha...
Harshal Haridas, Ali R. Hurson, Yu Jiao
105
Voted
MICRO
2003
IEEE
96views Hardware» more  MICRO 2003»
15 years 9 months ago
Using Interaction Costs for Microarchitectural Bottleneck Analysis
Attacking bottlenecks in modern processors is difficult because many microarchitectural events overlap with each other. This parallelism makes it difficult to both (a) assign a ...
Brian A. Fields, Rastislav Bodík, Mark D. H...