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» Response Time Properties of Some Asynchronous Circuits
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FMICS
2006
Springer
13 years 11 months ago
Test Coverage for Loose Timing Annotations
Abstract. The design flow of systems-on-a-chip (SoCs) identifies several abstraction levels higher than the Register-Transfer-Level that constitutes the input of the synthesis tool...
Claude Helmstetter, Florence Maraninchi, Laurent M...
EH
2002
IEEE
112views Hardware» more  EH 2002»
14 years 18 days ago
Evolving Circuits in Seconds: Experiments with a Stand-Alone Board-Level Evolvable System
The purpose of this paper is twofold: first, to illustrate a stand-alone board-level evolvable system (SABLES) and its performance, and second to illustrate some problems that occ...
Adrian Stoica, Ricardo Salem Zebulum, Michael I. F...
DATE
2002
IEEE
102views Hardware» more  DATE 2002»
14 years 18 days ago
Improving Placement under the Constant Delay Model
In this paper, we show that under the constant delay model the placement problem is equivalent to minimizing a weighted sum of wire lengths. The weights can be efficiently compute...
Kolja Sulimma, Wolfgang Kunz, Ingmar Neumann, Luka...
ICCD
2001
IEEE
88views Hardware» more  ICCD 2001»
14 years 4 months ago
Jitter-Induced Power/ground Noise in CMOS PLLs: A Design Perspective
CMOS Phase-locked loops (PLL) are ubiquitous in RF and mixed-signal integrated circuits. PLLs are very sensitive to noise fluctuations on the power and ground rails. In this paper...
Payam Heydari, Massoud Pedram
PODC
1998
ACM
13 years 12 months ago
Probabilistic Byzantine Quorum Systems
ÐIn this paper, we explore techniques to detect Byzantine server failures in asynchronous replicated data services. Our goal is to detect arbitrary failures of data servers in a s...
Dahlia Malkhi, Michael K. Reiter, Avishai Wool, Re...