Sciweavers

66 search results - page 1 / 14
» Retargetable compilation for low power
Sort
View
CODES
2001
IEEE
13 years 11 months ago
Retargetable compilation for low power
Most research to date on energy minimization in DSP processors has focuses on hardware solution. This paper examines the software-based factors affecting performance and energy co...
Wen-Tsong Shiue
DAC
1999
ACM
14 years 8 months ago
Power Efficient Mediaprocessors: Design Space Exploration
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
Johnson Kin, Chunho Lee, William H. Mangione-Smith...
ISSS
1998
IEEE
117views Hardware» more  ISSS 1998»
13 years 11 months ago
HDL-Based Modeling of Embedded Processor Behavior for Retargetable Compilation
The concept of retargetability enables compiler technology to keep pace with the increasing variety of domain-speci c embedded processors. In order to achieve user retargetability,...
Rainer Leupers
DATE
2004
IEEE
181views Hardware» more  DATE 2004»
13 years 11 months ago
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based...
Manuel Hohenauer, Hanno Scharwächter, Kingshu...
VLSISP
2008
159views more  VLSISP 2008»
13 years 7 months ago
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores
The compiler is generally regarded as the most important software component that supports a processor design to achieve success. This paper describes our application of the open re...
Yung-Chia Lin, Chia-Han Lu, Chung-Ju Wu, Chung-Lin...