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» Reuse Technique in Hardware Design
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CORR
2011
Springer
200views Education» more  CORR 2011»
14 years 9 months ago
Analytical Evaluation of Fractional Frequency Reuse for OFDMA Cellular Networks
Fractional frequency reuse (FFR) is an interference management technique well-suited to OFDMAbased cellular networks wherein the cells are partitioned into spatial regions with di...
Thomas David Novlan, Radha Krishna Ganti, Arunabha...
ISQED
2006
IEEE
118views Hardware» more  ISQED 2006»
15 years 11 months ago
Design of a Single Event Upset (SEU) Mitigation Technique for Programmable Devices
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...
Sajid Baloch, Tughrul Arslan, Adrian Stoica
DATE
2007
IEEE
108views Hardware» more  DATE 2007»
15 years 12 months ago
Evaluation of design for reliability techniques in embedded flash memories
Non-volatile Flash memories are becoming more and more popular in Systems-on-Chip (SoC). Embedded Flash (eFlash) memories are based on the well-known floatinggate transistor conce...
Benoît Godard, Jean Michel Daga, Lionel Torr...
ISLPED
2000
ACM
111views Hardware» more  ISLPED 2000»
15 years 10 months ago
Low power techniques and design tradeoffs in adaptive FIR filtering for PRML read channels
In this paper, we describe area and power reduction techniques for a low-latency adaptive finite-impulse response filter for magnetic recording read channel applications. Variou...
Khurram Muhammad, Robert B. Staszewski, Poras T. B...
ICCS
2001
Springer
15 years 10 months ago
Optimizing Sparse Matrix Computations for Register Reuse in SPARSITY
Abstract. Sparse matrix-vector multiplication is an important computational kernel that tends to perform poorly on modern processors, largely because of its high ratio of memory op...
Eun-Jin Im, Katherine A. Yelick