2778 search results - page 499 / 556 » Reuse Technique in Hardware Design |
FPGA
2007
ACM
14 years 2 months ago
2007
ACM
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
GECCO
2007
Springer
14 years 2 months ago
2007
Springer
This paper describes the application of evolutionary search to the problem of Flash memory wear-out. The operating parameters of Flash memory are notoriously difficult to determin...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
ASPLOS
2006
ACM
14 years 2 months ago
2006
ACM
The sustained push toward smaller and smaller technology sizes has reached a point where device reliability has moved to the forefront of concerns for next-generation designs. Sil...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
Memory is a scarce resource in many embedded systems. Increasing memory often increases packaging and cooling costs, size, and energy consumption. This paper presents CRAMES, an e...