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» Reuse Technique in Hardware Design
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DAC
2006
ACM
14 years 9 months ago
Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
Yu Hu, Yan Lin, Lei He, Tim Tuan
HPCA
2008
IEEE
14 years 8 months ago
Amdahl's Law in the multicore era
We apply Amdahl's Law to multicore chips using symmetric cores, asymmetric cores, and dynamic techniques that allows cores to work together on sequential execution. To Amdahl...
Mark D. Hill
MOBISYS
2008
ACM
14 years 8 months ago
Symphony: synchronous two-phase rate and power control in 802.11 wlans
Adaptive transmit power control in 802.11 Wireless LANs (WLANs) on a per-link basis helps increase network capacity and improves battery life of Wifi-enabled mobile devices. Howev...
Kishore Ramachandran, Ravi Kokku, Honghai Zhang, M...
ACSAC
2009
IEEE
14 years 3 months ago
MAVMM: Lightweight and Purpose Built VMM for Malware Analysis
—Malicious software is rampant on the Internet and costs billions of dollars each year. Safe and thorough analysis of malware is key to protecting vulnerable systems and cleaning...
Anh M. Nguyen, Nabil Schear, HeeDong Jung, Apeksha...
SENSYS
2009
ACM
14 years 3 months ago
Run time assurance of application-level requirements in wireless sensor networks
Continuous and reliable operation of WSNs is notoriously difficult to guarantee due to hardware degradation and environmental changes. In this paper, we propose and demonstrate a ...
Jingyuan Li, Yafeng Wu, Krasimira Kapitanova, John...