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ERSA
2004
129views Hardware» more  ERSA 2004»
13 years 9 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna
WSC
1997
13 years 9 months ago
Design and Implementation of HLA Time Management in the RTI Version F.0
The DoD High Level architecture (HLA) has recently become the required method for the interconnection of all DoD computer simulations. The HLA addresses the rules by which simulat...
Christopher D. Carothers, Richard Fujimoto, Richar...
DAC
2003
ACM
14 years 8 months ago
Automated synthesis of efficient binary decoders for retargetable software toolkits
A binary decoder is a common component of software development tools such as instruction set simulators, disassemblers and debuggers. The efficiency of the decoder can have a sign...
Wei Qin, Sharad Malik
SIMUTOOLS
2008
13 years 9 months ago
Simulating SMEPP middleware
Embedded Peer-to-Peer Systems (EP2P) represent a new challenge in the development of software for distributed systems. The main objective of the SMEPP (Secure Middleware for Embed...
Javier Barbarán, Carlos Bonilla, Jose &Aacu...
DAC
2006
ACM
14 years 8 months ago
Efficient simulation of critical synchronous dataflow graphs
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Chia-Jui Hsu, José Luis Pino, Ming-Yung Ko,...