242 search results - page 33 / 49 » Reversible Fault-Tolerant Logic |
ATAL
2008
Springer
13 years 10 months ago
2008
Springer
In this paper, we describe two mission critical applications currently deployed by Telecom Italia in the Operations Support System domains. The first one called "Network Neut...
DEBS
2008
ACM
13 years 10 months ago
2008
ACM
We propose a sensornet programming model based on declarative spatio-temporal constraints on events only, not sensors. Where previous approaches conflate events and sensors becaus...
EDCC
2008
Springer
13 years 10 months ago
2008
Springer
The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
BCS
2008
13 years 10 months ago
2008
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
ISLPED
2005
ACM
14 years 2 months ago
2005
ACM
We describe an adiabatic microprocessor implemented with a reversible logic, nRERL [1]. We employed an 8-phase clocked power instead of 6-phase one to reduce the number of buffers...