242 search results - page 9 / 49 » Reversible Fault-Tolerant Logic |
DSD
2009
IEEE
13 years 10 months ago
2009
IEEE
Todays NoCs are reaching a level where it is getting very hard to ensure 100% of functionality. Consequently, fault tolerance has become an important aspect in todays design techn...
DSD
2004
IEEE
13 years 10 months ago
2004
IEEE
This paper describes the architecture of a safety system of the railway's interlocking equipment, which has been developed for Czech railways. The system will be used for the...
FPGA
2003
ACM
13 years 12 months ago
2003
ACM
This paper proposes a new high-level technique for designing fault tolerant systems in SRAM-based FPGAs, without modifications in the FPGA architecture. Traditionally, TMR has bee...
AKA
2004
13 years 8 months ago
2004
: The transaction concept enables the efficient development of concurrent and fault tolerant applications. Transaction services are therefore an essential part of modern component ...
ISCAS
2006
IEEE
14 years 22 days ago
2006
IEEE
Abstract— Although many researchers are investigating techniques to synthesize reversible combinational logic, there is little work in the area of sequential reversible logic. We...