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» Reversible Logic to Cryptographic Hardware: A New Paradigm
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ATS
2005
IEEE
164views Hardware» more  ATS 2005»
13 years 9 months ago
A Family of Logical Fault Models for Reversible Circuits
Reversibility is of interest in achieving extremely low power dissipation; it is also an inherent design requirement of quantum computation. Logical fault models for conventional ...
Ilia Polian, Thomas Fiehn, Bernd Becker, John P. H...
CDES
2009
87views Hardware» more  CDES 2009»
13 years 8 months ago
Delay-Insensitive Ternary Logic
This paper develops a delay-insensitive (DI) digital design paradigm that utilizes ternary logic as an alternative to dual-rail logic for encoding the DATA and NULL states. This ne...
Ravi Sankar Parameswaran Nair, Scott C. Smith, Jia...
FSKD
2007
Springer
98views Fuzzy Logic» more  FSKD 2007»
14 years 1 months ago
New Components for Building Fuzzy Logic Circuits
This paper presents two new designs of fuzzy logic circuit components. Currently due to the lack of fuzzy components, many fuzzy systems cannot be fully implemented in hardware. W...
Ben Choi, K. Tipnis
ATS
2004
IEEE
116views Hardware» more  ATS 2004»
13 years 11 months ago
Testing for Missing-Gate Faults in Reversible Circuits
Logical reversibility occurs in low-power applications and is an essential feature of quantum circuits. Of special interest are reversible circuits constructed from a class of rev...
John P. Hayes, Ilia Polian, Bernd Becker
TVLSI
2010
13 years 2 months ago
A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization
Hardware debuggers and logic analyzers must be able to record a continuous trace of data. Since the trace data are tremendous, to save space, these traces are often compressed. The...
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang