Sciweavers

1097 search results - page 195 / 220
» Revision Programming = Logic Programming Integrity Constra...
Sort
View
111
Voted
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
15 years 7 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati
164
Voted
ECBS
2006
IEEE
203views Hardware» more  ECBS 2006»
15 years 6 months ago
The Feature-Architecture Mapping (FArM) Method for Feature-Oriented Development of Software Product Lines
Software product lines (PLs) are large, complex systems, demanding high maintainability and enhanced flexibility. Nonetheless, in the state of the art PL methods, features are sca...
Periklis Sochos, Matthias Riebisch, Ilka Philippow
ICRA
2010
IEEE
147views Robotics» more  ICRA 2010»
15 years 1 months ago
Learning physically-instantiated game play through visual observation
Abstract— We present an integrated vision and robotic system that plays, and learns to play, simple physically-instantiated board games that are variants of TIC TAC TOE and HEXAP...
Andrei Barbu, Siddharth Narayanaswamy, Jeffrey Mar...
124
Voted
WSC
2008
15 years 4 months ago
Architecture for modeling, simulation, and execution of PLC based manufacturing system
In this paper, we propose an integrated architecture for modeling, simulation, and execution of PLC (Programmable Logic Controller) based manufacturing system. The main objective ...
Devinder Thapa, Chang Mok Park, Kwan Hee Han, Sang...
145
Voted
KBSE
2005
IEEE
15 years 8 months ago
Automated test generation for engineering applications
In test generation based on model-checking, white-box test criteria are represented as trap conditions written in a temporal logic. A model checker is used to refute trap conditio...
Songtao Xia, Ben Di Vito, César Muño...