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IJNS
2000
130views more  IJNS 2000»
13 years 7 months ago
A Programmable VLSI Filter Architecture for Application in Real-Time Vision Processing Systems
An architecture is proposed for the realization of real-time edge-extraction filtering operation in an Address-Event-Representation (AER) vision system. Furthermore, the approach ...
Teresa Serrano-Gotarredona, Andreas G. Andreou, Be...
TVLSI
1998
122views more  TVLSI 1998»
13 years 7 months ago
Algorithm-based low-power transform coding architectures: the multirate approach
—In most low-power VLSI designs, the supply voltage is usually reduced to lower the total power consumption. However, the device speed will be degraded as the supply voltage goes...
An-Yeu Wu, K. J. Ray Liu
DAC
1996
ACM
13 years 11 months ago
Delay Minimal Decomposition of Multiplexers in Technology Mapping
Technology mapping requires the unmapped logic network to be represented in terms of base functions, usually two-input NORs and inverters. Technology decomposition is the step tha...
Shashidhar Thakur, D. F. Wong, Shankar Krishnamoor...
DAC
1994
ACM
13 years 11 months ago
Optimum Functional Decomposition Using Encoding
In this paper, we revisit the classical problem of functional decomposition [1, 2] that arises so often in logic synthesis. One basic problem that has remained largely unaddressed...
Rajeev Murgai, Robert K. Brayton, Alberto L. Sangi...
ICMCS
2006
IEEE
194views Multimedia» more  ICMCS 2006»
14 years 1 months ago
An Architecture Design of Threshold-Based Best-Basis Algorithm
The best-basis algorithm has gained much importance on textured-based image compression and denoising of signals. In this paper, an architecture for the wavelet-packet based best-...
S. Mayilavelane Aroutchelvame, Kaamran Raahemifar