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134
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ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
15 years 8 months ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
122
Voted
PPPJ
2009
ACM
15 years 8 months ago
Virtual reuse distance analysis of SPECjvm2008 data locality
Reuse distance analysis has been proved promising in evaluating and predicting data locality for programs written in Fortran or C/C++. But its effect has not been examined for ap...
Xiaoming Gu, Xiao-Feng Li, Buqi Cheng, Eric Huang
SIGCOMM
1996
ACM
15 years 7 months ago
Receiver-Driven Layered Multicast
State of the art, real-time, rate-adaptive, multimedia applications adjust their transmission rate to match the available network capacity. Unfortunately, this source-based rate-a...
Steven McCanne, Van Jacobson, Martin Vetterli
129
Voted
INFOCOM
1994
IEEE
15 years 7 months ago
Optimization of Wireless Resources for Personal Communications Mobility Tracking
In personal communications applications, users communicate via wireless with a wireline network. The wireline network tracks the current location of the user, and can therefore ro...
Upamanyu Madhow, Michael L. Honig, Kenneth Steigli...
AISB
2008
Springer
15 years 5 months ago
Foundations of a Philosophy of Collective Intelligence
Philosophy, artificial intelligence and cognitive science have long been dominated by the presupposition that intelligence is fundamentally individual. Recent work in cognitive sci...
Harry Halpin
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