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» Robust IP Watermarking Methodologies for Physical Design
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TIP
2002
94views more  TIP 2002»
13 years 7 months ago
Denoising and copy attacks resilient watermarking by exploiting prior knowledge at detector
Watermarkingwith both obliviousdetection and high robustness capabilities is still a challenging problem. The existing methods are either robust or oblivious, but it is di cult to...
Chun-Shien Lu, Hong-Yuan Mark Liao, Martin Kutter
ICCD
2004
IEEE
135views Hardware» more  ICCD 2004»
14 years 4 months ago
Design Methodologies and Architecture Solutions for High-Performance Interconnects
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
Davide Pandini, Cristiano Forzan, Livio Baldi
ICCAD
1994
IEEE
200views Hardware» more  ICCAD 1994»
13 years 11 months ago
Techniques for crosstalk avoidance in the physical design of high-performance digital systems
Interconnectperformance does not scale well into deep submicron dimensions, and the rising number of analog effects erodes tal abstraction necessary for high levels of integration...
Desmond Kirkpatrick, Alberto L. Sangiovanni-Vincen...
IH
2001
Springer
13 years 11 months ago
Computational Forensic Techniques for Intellectual Property Protection
Computational forensic engineering (CFE) aims to identify the entity that created a particular intellectual property (IP). Rather than relying on watermarking content or designs, t...
Jennifer L. Wong, Darko Kirovski, Miodrag Potkonja...
ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
14 years 8 days ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...