167 search results - page 17 / 34 » Robust Techniques for Watermarking Sequential Circuit Design... |
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
Retiming and resynthesis are among the most important techniques for practical sequential circuit optimization. However, their applicability is much limited due to verification c...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
This paper uses under-approximation of unreachable states of a design to derive incomplete specification of combinational logic. The resulting incompletely-specified functions are...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
3D integration of multiple active layers into a single chip is a viable technique that greatly reduces the length of global wires by providing vertical connections between layers....
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Subthreshold logic is showing good promise as a viable ultra-low-power circuit design technique for powerlimited applications. For this design technique to gain widespread adoption...
DAC
2006
ACM
14 years 1 months ago
2006
ACM
Negative bias temperature instability (NBTI) has become the dominant reliability concern for nanoscale PMOS transistors. In this paper, a predictive model is developed for the deg...