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» Robustness of Sequential Circuits

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GLVLSI
1998
IEEE

106views VLSI» more GLVLSI 1998»

Test Compaction for Synchronous Sequential Circuits by Test Sequence Recycling

14 years 1 months ago

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Irith Pomeranz, Sudhakar M. Reddy

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VTS
1998
IEEE

97views Hardware» more VTS 1998»

On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits

14 years 1 months ago

Download www.cad.polito.it

This paper presents a BIST architecture for Finite State Machines that exploits Cellular Automata (CA) as pattern generators and signature analyzers. The main advantage of the pro...

Fulvio Corno, Nicola Gaudenzi, Paolo Prinetto, Mat...

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DATE
1997
IEEE

76views Hardware» more DATE 1997»

New static compaction techniques of test sequences for sequential circuits

14 years 1 months ago

Download www.cecs.uci.edu

Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...

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DAC
1996
ACM

84views Computer Architecture» more DAC 1996»

Optimal Clock Period FPGA Technology Mapping for Sequential Circuits

14 years 1 months ago

Download www.eecs.berkeley.edu

Peichen Pan, C. L. Liu

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EURODAC
1994
IEEE

115views VHDL» more EURODAC 1994»

Control Path Oriented Verification of Sequential Generic Circuits with Control and Data Path

14 years 1 months ago

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