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ICCAD
1997
IEEE
125views Hardware» more  ICCAD 1997»
14 years 1 months ago
A deductive technique for diagnosis of bridging faults
A deductive technique is presented that uses voltage testing for the diagnosis of single bridging faults between two gate input or output lines and is applicable to combinational ...
Srikanth Venkataraman, W. Kent Fuchs
VTS
1996
IEEE
126views Hardware» more  VTS 1996»
14 years 1 months ago
Automatic test generation using genetically-engineered distinguishing sequences
A fault-oriented sequential circuit test generator is described in which various types of distinguishing sequences are derived, both statically and dynamically, to aid the test ge...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
FORTE
1998
13 years 10 months ago
Hardware synthesis from protocol specifications in LOTOS
: In this paper, we propose a technique for hardware implementation of protocol specifications in LOTOS. For the purpose, we define a new model called synchronous EFSMs consisting ...
Keiichi Yasumoto, Akira Kitajima, Teruo Higashino,...
DAC
2005
ACM
13 years 10 months ago
Asynchronous circuits transient faults sensitivity evaluation
1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circui...
Yannick Monnet, Marc Renaudin, Régis Leveug...
TCAD
1998
119views more  TCAD 1998»
13 years 8 months ago
A controller redesign technique to enhance testability of controller-data path circuits
—We study the effect of the controller on the testability of sequential circuits composed of controllers and data paths. We show that even when all the loops of the circuit have ...
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak