Sciweavers

768 search results - page 55 / 154
» Robustness of Sequential Circuits
Sort
View
IOLTS
2006
IEEE
103views Hardware» more  IOLTS 2006»
14 years 2 months ago
Designing Robust Checkers in the Presence of Massive Timing Errors
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
Frederic Worm, Patrick Thiran, Paolo Ienne
CVBIA
2005
Springer
14 years 2 months ago
Registration of 3D Angiographic and X-Ray Images Using Sequential Monte Carlo Sampling
Abstract. Digital subtraction angiography (DSA) reconstructions and 3D Magnetic Resonance Angiography (MRA) are the modalities of choice for diagnosis of vascular diseases. However...
Charles Florin, James Williams, Ali Khamene, Nikos...
GECCO
2009
Springer
113views Optimization» more  GECCO 2009»
13 years 6 months ago
Single step evolution of robot controllers for sequential tasks
The generation of robot controllers for a task requiring a sequence of elementary behaviors is still a challenge. If these behaviors are known, intermediate steps can be given to ...
Stéphane Doncieux, Jean-Baptiste Mouret
VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
14 years 9 months ago
Register Transfer Operation Analysis during Data Path Verification
A control part ? data path partition based sequential circuit verification scheme aimed at avoiding state explosion comprises two major modules namely, a data path verifier and a ...
D. Sarkar
ASPDAC
2007
ACM
102views Hardware» more  ASPDAC 2007»
14 years 25 days ago
Clock Skew Scheduling with Delay Padding for Prescribed Skew Domains
Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full ...
Chuan Lin, Hai Zhou