Asynchronous circuits operate correctly only under timing assumptions. Hence testing those circuits for delay faults is crucial. This paper describes a three-step method to detect...
Michael Kishinevsky, Alex Kondratyev, Luciano Lava...
Abstract--In this paper, we present an efficient graph-based evolutionary optimization technique called evolutionary graph generation (EGG) and the proposed approach is applied to ...
Implementing a built-in self-test by a "test per clock" scheme offers advantages concerning fault coverage, detection of delay faults, and test application time. Such a ...
The study of asynchronous circuit behaviors in the presence of component and wire delays has received a great deal of attention. In this paper, we consider asynchronous circuits wh...
— A methodology is proposed for interdependent setup time and hold time characterization of sequential circuits. Integrating the methodology into an industrial sign-off static ti...
Emre Salman, Eby G. Friedman, Ali Dasdan, Feroze T...