768 search results - page 76 / 154 » Robustness of Sequential Circuits |
INTEGRATION
2006
13 years 8 months ago
2006
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
ICCAD
1999
IEEE
14 years 1 months ago
1999
IEEE
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behaviour. Asynchronous spee...
ARVLSI
2001
IEEE
14 years 13 days ago
2001
IEEE
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...
ISQED
2007
IEEE
14 years 3 months ago
2007
IEEE
This paper studies the impact of variability on the noise robustness of logic gates using noise rejection curves (NRCs). NRCs allow noise pulses to be modeled using magnitude-dura...
ICCAD
2002
IEEE
14 years 5 months ago
2002
IEEE
Fourier-envelope algorithms are an important component of the mixed-signal/RF verification toolbox. In this paper, we address the unpredictability and lack of robustness that has...