24 search results - page 3 / 5 » Rotary router: an efficient architecture for CMP interconnec... |
ISPASS
2009
IEEE
14 years 2 months ago
2009
IEEE
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
TPDS
2002
13 years 7 months ago
2002
Multiprocessor architectures demand efficient interprocessor communication to maximize system utilization and performance. To meet future demands, these interconnects must communic...
HPCA
2007
IEEE
14 years 7 months ago
2007
IEEE
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
PDP
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
A Field Programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism...