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» Router designs for elastic buffer on-chip networks
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NOCS
2010
IEEE
13 years 6 months ago
Design of a High-Throughput Distributed Shared-Buffer NoC Router
Router microarchitecture plays a central role in the performance of an on-chip network (NoC). Buffers are needed in routers to house incoming flits which cannot be immediately forw...
Rohit Sunkam Ramanujam, Vassos Soteriou, Bill Lin,...
ANCS
2007
ACM
14 years 12 days ago
Experimenting with buffer sizes in routers
Recent theoretical results in buffer sizing research suggest that core Internet routers can achieve high link utilization, if they are capable of storing only a handful of packets...
Neda Beheshti, Jad Naous, Yashar Ganjali, Nick McK...
ICPP
1999
IEEE
14 years 21 days ago
Adaptive Bubble Router: A Design to Improve Performance in Torus Networks
A router design for torus networks that significantly reduces message latency over traditional wormhole routers is presented in this paper. This new router implements virtual cut-...
Valentin Puente, Ramón Beivide, José...
HPCA
2009
IEEE
14 years 9 months ago
Elastic-buffer flow control for on-chip networks
This paper presents elastic buffers (EBs), an efficient flow-control scheme that uses the storage already present in pipelined channels in place of explicit input virtualchannel b...
George Michelogiannakis, James D. Balfour, William...
DSD
2009
IEEE
118views Hardware» more  DSD 2009»
14 years 3 months ago
Internet-Router Buffered Crossbars Based on Networks on Chip
—The scalability and performance of the Internet depends critically on the performance of its packet switches. Current packet switches are based on single-hop crossbar fabrics, w...
Kees Goossens, Lotfi Mhamdi, Iria Varela Senin