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» Routers with Very Small Buffers
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ISCA
2011
IEEE
258views Hardware» more  ISCA 2011»
13 years 1 months ago
A case for heterogeneous on-chip interconnects for CMPs
Network-on-chip (NoC) has become a critical shared resource in the emerging Chip Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across the enti...
Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. ...
VLSID
2009
IEEE
99views VLSI» more  VLSID 2009»
14 years 10 months ago
Forecasting-Based Dynamic Virtual Channels Allocation for Power Optimization of Network-on-Chips
In this paper, we present a dynamic power management technique for optimizing the use of virtual channels in network on chips. The technique which is called dynamic virtual channe...
Amir-Mohammad Rahmani, Masoud Daneshtalab, Ali Afz...
INFOCOM
2006
IEEE
14 years 3 months ago
Looking at Large Networks: Coding vs. Queueing
— Traditionally, network buffer resources have been used at routers to queue transient packets to prevent packet drops. In contrast, we propose a scheme for large multi-hop netwo...
Sandeep Bhadra, Sanjay Shakkottai
GLOBECOM
2009
IEEE
14 years 4 months ago
Emulation of Optical PIFO Buffers
—With recent advances in optical technology, we are closer to building all-optical routers than ever before. A major problem in this area, however, is the lack of all-optical mem...
Houman Rastegarfar, Monia Ghobadi, Yashar Ganjali
JNCA
2007
80views more  JNCA 2007»
13 years 9 months ago
High-speed routers design using data stream distributor unit
As the line rates standards are changing frequently to provide higher bit rates, the routers design has become very challenging due to the need for new wire-speed router’s netwo...
Ali El Kateeb