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» Routing in Modular Fault Tolerant Multiprocessor Systems
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IPPS
1999
IEEE
14 years 1 months ago
Oblivious Deadlock-Free Routing in a Faulty Hypercube
A central problem in massively parallel computing is efficiently routing data between processors. This problem is complicated by two considerations. First, in any massively parall...
Jin Suk Kim, Eric Lehman, Frank Thomson Leighton
ICNS
2009
IEEE
13 years 6 months ago
HGRID: Fault Tolerant, Log2N Resource Management for Grids
Grid Resource Discovery Service is currently a very important focus of research. We propose a scheme that presents essential characteristics for efficient, self-configuring and fau...
Antonia Gallardo, Kana Sanjeevan, Luis Díaz...
HPCA
2007
IEEE
14 years 9 months ago
Evaluating MapReduce for Multi-core and Multiprocessor Systems
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
Colby Ranger, Ramanan Raghuraman, Arun Penmetsa, G...
TC
1998
13 years 8 months ago
Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
—The very high levels of integration and submicron device sizes used in current and emerging VLSI technologies for FPGAs lead to higher occurrences of defects and operational fau...
Fran Hanchek, Shantanu Dutt
EDCC
2006
Springer
14 years 19 days ago
SEU Mitigation Techniques for Microprocessor Control Logic
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
T. S. Ganesh, Viswanathan Subramanian, Arun K. Som...