Multiprocessor SoCs are increasingly deployed in embedded systems with little or no security features built in. Code Injection attacks are one of the most commonly encountered sec...
Krutartha Patel, Sridevan Parameswaran, Seng Lin S...
Triple Modular Redundancy (TMR) is a common reliability technique for mitigating single event upsets (SEUs) in FPGA designs operating in radiation environments. For FPGA systems t...
In this paper we present a robust software infrastructure for metacomputing. The system is intended to be used by others as a building block for large and powerful computational g...
We present a new publish-subscribe middleware called REDS (REconfigurable Dispatching System) designed to tolerate dynamic reconfigurations of the dispatching infrastructure, like...
Region concept helps to accommodate cores larger than the tile size in mesh topology NoC architectures. In addition, it offers many new opportunities for NoC design, as well as pr...