Level-sensitive transparent latches are widely used in high-performance sequential circuit designs. Under process variations, the timing of a transparently latched circuit will ada...
Abstract. We define a framework based on computational logic technology and on a reactive axiomatization of the Event Calculus to formalize the evolution of commitments in time. We...
Paolo Torroni, Federico Chesani, Paola Mello, Marc...
Web applications are widely adopted and their correct functioning is mission critical for many businesses. At the same time, Web applications tend to be error prone and implementat...
Lieven Desmet, Pierre Verbaeten, Wouter Joosen, Fr...
In this paper, we address the correct refinement of abstract architectural models into more platformspecific representations. We consider the challenging case of dynamic architect...
Recent developments in runtime verification and monitoring show that parametric regular and temporal logic specifications can be efficiently monitored against large programs. Howev...
Patrick O'Neil Meredith, Dongyun Jin, Feng Chen, G...