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» Run-time Optimization for Pipelined Systems
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IPL
2002
79views more  IPL 2002»
13 years 7 months ago
A self-adjusting quality of service control scheme
We propose and analyze a self-adjusting Quality of Service (QoS) control scheme with the goal of optimizing the system reward as a result of servicing different priority clients w...
Sheng-Tzong Cheng, Ing-Ray Chen
ISPASS
2006
IEEE
14 years 1 months ago
Comparing simulation techniques for microarchitecture-aware floorplanning
— Due to the long simulation times of the reference input sets, microarchitects resort to alternative techniques to speed up cycle-accurate simulations. However, the reduction in...
Vidyasagar Nookala, Ying Chen, David J. Lilja, Sac...
DATE
2011
IEEE
223views Hardware» more  DATE 2011»
12 years 11 months ago
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
Martin Schoeberl, Pascal Schleuniger, Wolfgang Puf...
DAC
2000
ACM
14 years 8 months ago
The design and use of simplepower: a cycle-accurate energy estimation tool
In this paper, we presen t the design and use of a comprehensiv e framework, SimplePower, for evaluating the e ect of high-level algorithmic, architectural, and compilation tradeo...
Wu Ye, Narayanan Vijaykrishnan, Mahmut T. Kandemir...
ICCAD
1991
IEEE
100views Hardware» more  ICCAD 1991»
13 years 11 months ago
Layout Driven Logic Restructuring/Decomposition
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
Massoud Pedram, Narasimha B. Bhat