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MICRO
1999
IEEE
98views Hardware» more  MICRO 1999»
13 years 11 months ago
Access Region Locality for High-Bandwidth Processor Memory System Design
This paper studies an interesting yet less explored behavior of memory access instructions, called access region locality. Unlike the traditional temporal and spatial data localit...
Sangyeun Cho, Pen-Chung Yew, Gyungho Lee
ISCAS
2005
IEEE
158views Hardware» more  ISCAS 2005»
14 years 1 months ago
Designing optimized pipelined global interconnects: algorithms and methodology impact
— As across-chip wire delays exceed a clock cycle, interconnect pipelining becomes essential. However, the arbitrary insertion of flip-flops can change the differentials of lat...
Vidyasagar Nookala, Sachin S. Sapatnekar
PODS
2001
ACM
143views Database» more  PODS 2001»
14 years 7 months ago
Pipelining in Multi-Query Optimization
Database systems frequently have to execute a set of related queries, which share several common subexpressions. Multi-query optimization exploits this, by finding evaluation plan...
Nilesh N. Dalvi, Sumit K. Sanghai, Prasan Roy, S. ...
DATE
2006
IEEE
115views Hardware» more  DATE 2006»
14 years 1 months ago
Optimal periodic testing of intermittent faults in embedded pipelined processor applications
Today’s nanometer technology trends have a very negative impact on the reliability of semiconductor products. Intermittent faults constitute the largest part of reliability fail...
Nektarios Kranitis, Andreas Merentitis, N. Laoutar...
ASPLOS
2004
ACM
14 years 29 days ago
Compiler orchestrated prefetching via speculation and predication
This paper introduces a compiler-orchestrated prefetching system as a unified framework geared toward ameliorating the gap between processing speeds and memory access latencies. ...
Rodric M. Rabbah, Hariharan Sandanagobalane, Mongk...