55 search results - page 5 / 11 » Run-time compaction of FPGA designs |
PAIRING
2010
Springer
13 years 5 months ago
2010
Springer
This paper presents a novel method for designing compact yet efficient hardware implementations of the Tate pairing over supersingular curves in small characteristic. Since such cu...
EMSOFT
2007
Springer
14 years 1 months ago
2007
Springer
There is increasing interest in using general-purpose operating systems, such as Linux, on embedded platforms. It is especially important in embedded systems to use memory effici...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
GLVLSI
2009
IEEE
2009
IEEE
Physical unclonable function and true random number generator: a compact and scalable implementation
13 years 11 months ago
Physical Unclonable Functions (PUF) and True Random Number Generators (TRNG) are two very useful components in secure system design. PUFs can be used to extract chip-unique signat...
GECCO
2003
Springer
14 years 19 days ago
2003
Springer
Abstract. Multi-FPGA systems (MFS) are used for a great variety of applications, for instance, dynamically re-configurable hardware applications, digital circuit emulation, and num...