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ERSA
2006
111views Hardware» more  ERSA 2006»
13 years 9 months ago
Promises and Pitfalls of Reconfigurable Supercomputing
Reconfigurable supercomputing (RSC) combines programmable logic chips with high performance microprocessors, all communicating over a high bandwidth, low latency interconnection n...
Maya Gokhale, Christopher Rickett, Justin L. Tripp...
HPCA
2007
IEEE
14 years 1 months ago
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
Liqun Cheng, John B. Carter, Donglai Dai
CORR
2010
Springer
128views Education» more  CORR 2010»
13 years 5 months ago
Trajectory Codes for Flash Memory
Abstract--Flash memory is well-known for its inherent asymmetry: the flash-cell charge levels are easy to increase but are hard to decrease. In a general rewriting model, the store...
Anxiao Jiang, Michael Langberg, Moshe Schwartz, Je...
3DIC
2009
IEEE
169views Hardware» more  3DIC 2009»
14 years 21 days ago
3-D memory organization and performance analysis for multi-processor network-on-chip architecture
Several forms of processor memory organizations have been in use to optimally access off-chip memory systems mainly the Hard disk drives (HDD). Recent trends show that the solid s...
Awet Yemane Weldezion, Zhonghai Lu, Roshan Weerase...
WONS
2005
IEEE
14 years 1 months ago
MASSIVE: An Emulation Environment for Mobile Ad-Hoc Networks
Developing and evaluating protocols and applications for mobile ad-hoc networks requires significant organisational effort when real mobile ad-hoc networks with several mobile te...
Michael Matthes, Holger Biehl, Michael Lauer, Oswa...