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» Runtime Reconfiguration of J2EE Applications
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DAGSTUHL
2006
13 years 9 months ago
Bridging the Gap between Relocatability and Available Technology: The Erlangen Slot Machine
We present an FPGA-based reconfigurable platform called Erlangen Slot Machine (ESM). The main advantages of this platform are: First, the possibility for each module to access peri...
Diana Göhringer, Mateusz Majer, Jürgen T...
CODES
2006
IEEE
13 years 11 months ago
A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH
This paper presents a hw/sw codesign methodology based on BORPH, an operating system designed for FPGA-based reconfigurable computers (RC's). By providing native kernel suppo...
Hayden Kwok-Hay So, Artem Tkachenko, Robert W. Bro...
FCCM
1998
IEEE
149views VLSI» more  FCCM 1998»
14 years 8 days ago
Configuration Compression for the Xilinx XC6200 FPGA
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting n...
Scott Hauck, Zhiyuan Li, Eric J. Schwabe
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
14 years 2 months ago
Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGA...
Matthew French, Erik Anderson, Dong-In Kang
FPL
2009
Springer
145views Hardware» more  FPL 2009»
14 years 19 days ago
Run-time Partial Reconfiguration speed investigation and architectural design space exploration
Run-time Partial Reconfiguration (PR) speed is significant in applications especially when fast IP core switching is required. In this paper, we propose to use Direct Memory Acce...
Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsc...