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RTCSA
2009
IEEE
14 years 2 months ago
Managing Imprecise Worst Case Execution Times on DVFS Platforms
Abstract—Although energy-efficient real-time task scheduling has attracted a lot of attention in the past decade, most existing results assumed deterministic execution lengths f...
Vandy Berten, Chi-Ju Chang, Tei-Wei Kuo
DATE
1999
IEEE
139views Hardware» more  DATE 1999»
14 years 1 days ago
OpenJ: An Extensible System Level Design Language
There is an increasing research interest in system level design languages which can carry designers from specification to implementation of system-on-a-chip. Unfortunately, two of...
Jianwen Zhu, Daniel Gajski
RSP
2003
IEEE
132views Control Systems» more  RSP 2003»
14 years 1 months ago
Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
DAC
2006
ACM
14 years 8 months ago
Programming models and HW-SW interfaces abstraction for multi-processor SoC
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...
Ahmed Amine Jerraya, Aimen Bouchhima, Fréd&...
FDL
2007
IEEE
14 years 2 months ago
Mapping Actor-Oriented Models to TLM Architectures
Actor-oriented modeling approaches are convenient for implementing functional models of embedded systems. Architectural models for heterogeneous system-on-chip architectures, howe...
Jens Gladigau, Christian Haubelt, Bernhard Niemann...