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DSD
2006
IEEE
126views Hardware» more  DSD 2006»
14 years 1 months ago
Off-Line Testing of Delay Faults in NoC Interconnects
Testing of high density SoCs operating at high clock speeds is an important but difficult problem. Many faults, like delay faults, in such sub-micron chips may only appear when th...
Tomas Bengtsson, Artur Jutman, Shashi Kumar, Raimu...
ISQED
2006
IEEE
118views Hardware» more  ISQED 2006»
14 years 1 months ago
Language-Based High Level Transaction Extraction on On-chip Buses
Abstract— With the increasing in silicon densities, SoC designs are the stream in modern electronics systems. Accordingly, the verification for SoC designs is crucial. One of th...
Yi-Le Huang, Chun-Yao Wang, Richard Yeh, Shih-Chie...
HICSS
2007
IEEE
133views Biometrics» more  HICSS 2007»
14 years 1 months ago
Service-Oriented Software Reengineering: SoSR
Service-Oriented Computing (SOC) enables the development and design of loosely coupled software components for integration with other software system. Since most legacy system wer...
Sam Chung, Joseph Byung Chul An, Sergio Davalos
DATE
2009
IEEE
130views Hardware» more  DATE 2009»
14 years 2 months ago
Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA
—IP-XACT is a standard for describing intellectual property metadata for System-on-Chip (SoC) integration. Reesearchers have proposed visualizing and abstracting IP-XACT objects ...
Tero Arpinen, Tapio Koskinen, Erno Salminen, Timo ...
ATS
2001
IEEE
172views Hardware» more  ATS 2001»
13 years 11 months ago
A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...
Chih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih...