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SIGMOD
1991
ACM
104views Database» more  SIGMOD 1991»
13 years 11 months ago
Managing Persistent Objects in a Multi-Level Store
This paper presents an architecture for a persistent object store in which multi-level storage is explicitly included. Traditionally, DBMSs have assumed that all accessible data r...
Michael Stonebraker
3DIC
2009
IEEE
169views Hardware» more  3DIC 2009»
14 years 1 months ago
3-D memory organization and performance analysis for multi-processor network-on-chip architecture
Several forms of processor memory organizations have been in use to optimally access off-chip memory systems mainly the Hard disk drives (HDD). Recent trends show that the solid s...
Awet Yemane Weldezion, Zhonghai Lu, Roshan Weerase...
ICCAD
2007
IEEE
116views Hardware» more  ICCAD 2007»
14 years 5 months ago
Device and architecture concurrent optimization for FPGA transient soft error rate
Late CMOS scaling reduces device reliability, and existing work has studied the permanent SER (soft error rate) for configuration memory in FPGA extensively. In this paper, we sh...
Yan Lin, Lei He
CDC
2009
IEEE
122views Control Systems» more  CDC 2009»
14 years 23 days ago
Optimal mistuning for improved stability of vehicular platoons
— We consider a decentralized bidirectional control of a platoon of N identical vehicles moving in a straight line. Such problems are known to suffer from poor stability margin a...
Prabir Barooah, Prashant G. Mehta
ISCA
2008
IEEE
136views Hardware» more  ISCA 2008»
13 years 8 months ago
The Design and Performance of a Bare PC Web Server
There is an increasing need for new Web server architectures that are application-centric, simple, small, and pervasive in nature. In this paper, we present a novel architecture f...
Long He, Ramesh K. Karne, Alexander L. Wijesinha