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FCCM
2006
IEEE
107views VLSI» more  FCCM 2006»
14 years 1 months ago
Hardware/Software Integration for FPGA-based All-Pairs Shortest-Paths
Field-Programmable Gate Arrays (FPGAs) are being employed in high performance computing systems owing to their potential to accelerate a wide variety of long-running routines. Par...
Uday Bondhugula, Ananth Devulapalli, James Dinan, ...
HPCA
1998
IEEE
14 years 1 days ago
Efficiently Adapting to Sharing Patterns in Software DSMs
In this paper we introduce a page-based Lazy Release Consistency protocol called ADSM that constantly and efficiently adapts to the applications' sharing patterns. Adaptation...
Luiz Rodolpho Monnerat, Ricardo Bianchini
WCET
2010
13 years 5 months ago
WCET Analysis of a Parallel 3D Multigrid Solver Executed on the MERASA Multi-Core
To meet performance requirements as well as constraints on cost and power consumption, future embedded systems will be designed with multi-core processors. However, the question o...
Christine Rochange, Armelle Bonenfant, Pascal Sain...
DAC
2008
ACM
14 years 8 months ago
Parallel programming: can we PLEASE get it right this time?
The computer industry has a problem. As Moore's law marches on, we will be exploiting it to double cores, not frequencies. But all those cores ... 2 to 4 today growing to 8, ...
Tim Mattson, Michael Wrinn
LCPC
1993
Springer
13 years 12 months ago
Maximizing Loop Parallelism and Improving Data Locality via Loop Fusion and Distribution
Abstract. Loop fusion is a program transformation that merges multiple loops into one. It is e ective for reducing the synchronization overhead of parallel loops and for improving ...
Ken Kennedy, Kathryn S. McKinley