97 search results - page 14 / 20 » SRAM Cell Current in Low Leakage Design |
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...
ISLPED
2006
ACM
14 years 1 months ago
2006
ACM
In a few technology generations, limitations of fabrication processes will make accurate design time power estimates a daunting challenge. Static leakage current which comprises a...
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
Energy consumption is a major concern in embedded computing systems. Several studies have shown that cache memories account for about 40% or more of the total energy consumed in t...
MICRO
2007
IEEE
14 years 2 months ago
2007
IEEE
Process variations will greatly impact the stability, leakage power consumption, and performance of future microprocessors. These variations are especially detrimental to 6T SRAM ...