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DATE
2006
IEEE
114views Hardware» more  DATE 2006»
14 years 4 months ago
COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC
Memory and communication architectures have a significant impact on the cost, performance, and time-to-market of complex multi-processor system-on-chip (MPSoC) designs. The memory...
Sudeep Pasricha, Nikil D. Dutt
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
14 years 4 months ago
Droplet routing in the synthesis of digital microfluidic biochips
same level of system-level CAD support that is now commonplace in the IC industry.Recent advances in microfluidics are expected to lead to sensor systems for high-throughput bioche...
Fei Su, William L. Hwang, Krishnendu Chakrabarty
FOCS
2006
IEEE
14 years 4 months ago
Strategic Network Formation through Peering and Service Agreements
We introduce a game theoretic model of network formation in an effort to understand the complex system of business relationships between various Internet entities (e.g., Autonomou...
Elliot Anshelevich, F. Bruce Shepherd, Gordon T. W...
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
14 years 4 months ago
SODA: A Low-power Architecture For Software Radio
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scot...
MICRO
2006
IEEE
127views Hardware» more  MICRO 2006»
14 years 4 months ago
A Predictive Performance Model for Superscalar Processors
Designing and optimizing high performance microprocessors is an increasingly difficult task due to the size and complexity of the processor design space, high cost of detailed si...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...