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IPPS
1992
IEEE
14 years 19 days ago
CCHIME: A Cache Coherent Hybrid Interconnected Memory Extension
This paper presents a hybrid shared memory architecture which combines the scalability of a multistage interconnection network with the contention reduction benefits of coherent c...
Matthew K. Farrens, Arvin Park, Allison Woodruff
ICPPW
2007
IEEE
14 years 2 months ago
P2P Live Streaming with Tree-Mesh based Hybrid Overlay
P2P technology has been widely adopted in live streaming system for its scalability and low commercial cost. However, tree based system or mesh based system still has to face the ...
Qi Huang, Hai Jin, Xiaofei Liao
IPPS
2006
IEEE
14 years 2 months ago
Architecture of a multi-context FPGA using a hybrid multiple-valued/binary context switching signal
Multi-context FPGAs have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. Large amount of memory causes significant ove...
Yoshihiro Nakatani, Masanori Hariyama, Michitaka K...
ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
14 years 3 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
BMCBI
2007
153views more  BMCBI 2007»
13 years 8 months ago
Analysis of nanopore detector measurements using Machine-Learning methods, with application to single-molecule kinetic analysis
Background: A nanopore detector has a nanometer-scale trans-membrane channel across which a potential difference is established, resulting in an ionic current through the channel ...
Matthew Landry, Stephen Winters-Hilt